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oneAPI: Backport an IGC byte destination alignment fix. - #15280
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HWConformity accepted a byte destination at byte 1 of a dword channel without aligning its root declare, so RA could place it at byte 3, which Gen12LP doesn't write. This made sub-group shuffles of mixed-width tuples return 0 for an Int8 field in oneAPI.jl. Reported upstream as intel/intel-graphics-compiler#456.
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Rebuilds libigc 2.41.5 with a fix to vISA's
HWConformity::fixDstAlignment. On Gen12LP (TGL, DG1, ADL), a byte destination can only start at byte 0 or 1 of a dword execution channel. The pass reads the destination's offset fromtryToAlignOperandand accepts byte 1. But when the operand itself can't be aligned,tryToAlignOperandreturns without aligning the root declare, so that offset is only relative to a declare RA may still place at byte 2. Thecharthen ends up at byte 3, which the hardware doesn't write:In oneAPI.jl, this made sub-group shuffles of
Tuple{Bool, Int8, Float16, UInt16}return 0 for theInt8. It showed up in KernelInterface's test suite with the device exception reporting of JuliaGPU/oneAPI.jl#731, but plain kernels hit it too. A 12-line OpenCL C reproducer is in intel/intel-graphics-compiler#456.When the reported offset is byte 1 and the operand couldn't be aligned, the patch aligns the root declare to the execution type with
tryToAlignOperandRootDcl. The same code is still on IGC master; an upstream PR will follow once this build is confirmed.